Friday, 1 November 2019

Signal Generator for Bat Receivers


In summer months, around dusk, I venture into our garden to watch bats feast on flying insects. In my valley, bat research + conservation garners deserved attention.  Bats prove an important part of nocturnal insect control & also help cycle nutrients from wetlands into forests.
Bat detectors, or bat receivers input bat audio in the range of ~15 -120 kHz and output AF into head phones, and/or give a Fourier transform of the received waveform on a small screen, or, in some cases, also provide the bats vocalized frequency range.

Bats frequency modulate ultrasonic audio and rapidly sense the location of fixed and/or moving objects in 3-dimensional space as they fly.  I’ve watched bats sense and careen around my dipole antenna wires on many occasions. They amaze me.

Bat receivers seem to fall into 3 basic categories:

  • Direct conversion; also call heterodyne, or zero IF
  • Direct digital sampling
  • Down conversion using logic IC division to move the frequency into a spectrum humans can hear

I plan to design and build my own bat receiver and to be honest, this task seems fairly unremarkable for someone who on occasion, designs and builds radio equipment. What you might lack is test equipment.

In order to start, I sought, an ultrasonic signal generator to help me design front ends, test mixers, and so forth. I wanted a very temperature stable signal source that gave some outputs between 15 to 100 KHz.  I sought a reasonably low distortion sine wave signal into a well buffered output network with amplitude control.  I require a sine wave output to measure loss or gain in my filters, amplifiers and downconverters.

Main Circuit Schematics 
Above — Main oscillator with binary division + signal conditioning.

The 74HC4060 14-stage ripple counter seems delightful. It offers a number of flip-flop bit counters, plus an inverter so you can hang an oscillator off this IC.  For temperature stability and ease, I chose a crystal oscillator. I wanted an output of 200 KHz, so that gave many crystal choices — ultimately, I went with a 3.2 MHz crystal fashioned in the usual Pierce oscillator topology.  Selecting output Q3 with Pin 7 gave divide by 16 and a 200 KHz output.

Above — Inverter output of my 4060 clocked at 3.2 MHz.

The 74HC193 4-bit synchronous binary up or down counter takes the 200 KHz signal and further divides it according to the 4-bit WORD set by data input pins 9, 10, 1 and 15.  Pin 9 is soldered to ground and stays Low. Pins 10, 1 and 15 are preset High through the 22K resistors. Thus the function table shown in the schematic should technically have Low placed in front of the other bits. For example, divide by 7 = Low, High ,High, High.

Pins 10,1 and 15 are set low as required by turning on a MOSFET switch. The 2N7000 is a lovely, inexpensive way to ground lower current components. I measured the average ON resistance on my board at 3.2 Ω for my 2N7000 trio.

A front panel switch controls the data bits of the 74HC193. You could eliminate the front panel 7PST switch + FETS and just ply 3 SPST front panel switches, however, I prefer grounding data pins local to the counter IC  — and not having to remember switch combinations to set the bits.

Steering diodes keep the MOSFETs on or off as selected. Not all of them are technically needed, but they cost pennies and ensure stable performance.

Above — Output of divide by 2 from the 74HC193 synchronous 4-bit binary up/down counter.

Following the programmable counters, comes a 74HC74 D flip-flop. Nothing cleans up a digital pulse better than a flip-flop. As you switch through the 7 frequency channels, each output exhibits a 50% duty cycle and is well conditioned for low-pass filtration into a sine wave.

Onto the low-pass filters and buffer stage:

Above — My low pass filter banks + the AF gain control and output buffer.

All signal capacitors are polyester types such as  polyester film, or metallised film etc..
I employed the NE5532 op amp throughout.  The 1  µF input connects the signal to a single order low-pass pole set for around 100 KHz and then into a unity gain buffer.

All of the op-amps employ a gain of 1 which simplifies construction.  The signal then passes through a cascade of second order low-pass filters that employ a Q of just under 1 ; Sallen-Key topology; and a Chebyshev response with a maximum ripple of 1 dB.

All filters use the same capacitor values and you can see how changing the 2 resistor values affects the 3 dB response of each filter.  I chose 5 filter outputs. The 20 + 25 KHz filter and 14.3 + 16.6 KHz  get combined to save 1 op-amp + 4 capacitors + 5 resistors.  Since these frequencies are fairly close together, attenuation of the higher of the 2 frequencies is minimal. You could actually make the whole board with just 3 filters: 50, 20 and 14.3 KHz, however, attenuation of some frequencies could be a deal breaker dependent on your needs.

The worst filtration occurs at 100 KHz, where the 2nd harmonic is only 20 dB down. For me, that's OK since I don't plan to use this much and its still reasonable for measurement purposes.

Above — The 100 KHz signal in Time Domain.

Above — An FFT of the 20 KHz signal. The worst harmonic = 38 dB down from the fundamental tone.  In an FFT of the 14.3 output, the worst harmonic is 43 dB down. Good results from simple low Q,  low-pass filters with 10% parts.

Above — A Time Domain DSO capture of the 20 KHz signal.

The various filter outputs connect to a 5 pole switch ( I stock 7 pole switches so 2 lugs go unused).
I can select the appropriate low-pass filter and may even "double down" by using the next  lower frequency filter knowing that the signal will get attenuated.

A 1 K pot allows a range of outputs from down a maximum somewhere between 5 and 7 volts peak to peak down to  ~ 10 - 20 mV pk-pk.

The output passes through 1 more unity gain voltage follower then to an AC-coupled RCA jack.
I plan to drive circuits directly,  or connect a piezo-electric transducer, or a MEMS ultrasonic transducer (CMUT) as needed.

Photographs and Final Notes

Above — I designed this project on the bench and built it using Ugly Construction.  I added  a power on LED to the circuit.

Above — Photo of the 7 channel selector switch plus entire circuit board. I do not plan to put in a case. I'll use it like this over the next couple of years.

Above — Filter section knob, plus gain pot and output RCA jack. I'll trim off the unused copper board using aviation shears.

 Above — Unused filters designed for 16.6 and 25 KHz.


  1. Since square waves are only supposed to contain odd harmonics I was wondering why the 2nd harmonic of 100khz was so high. Could there be leakage/cross-talk of the 74hc4060 200khz output into the final output?

  2. This comment has been removed by the author.

  3. Thanks for your comments Bob. Leakage is possible. A symmetrical wave form should exhibit odd-order harmonics; nor should a perfect differential pair(within an op-amp) generate even-order harmonics.

    However,I believe IMD goes on in the first buffer due to a non linear transfer function of the input BJT pair when driven hard by the flip-flop's output --- and of course, these harmonics go down the chain.

    To reduce/prevent non-linearity, I would have to attenuate the square wave signal and more gently drive the op-amp follower -- however, I would then have to add an active amp stage to boost back up the signal amplitude for my intended purposes.

    I also could have tried a simple dampening resistor and/or worked harder on the buffer filtration - but didn't care.
    Design is always about making trade offs. Best!

  4. nice idea...thanks for share Dinos